A Record-Breaking Milestone in Superconducting Density
Researchers at Imec have achieved a significant milestone in semiconductor innovation by demonstrating a circuit density of 3.8 million Josephson junctions per square centimeter. This development, presented at the 2026 Applied Superconductivity Conference, represents a leap forward for high-performance computing. By utilizing niobium-titanium-nitride, known as NbTiN, the team built circuits across three distinct metal layers. The smallest of these Josephson junctions measure a mere 150 nanometers across, allowing for a much tighter packing of electronic components than previously possible.
A Josephson junction functions as a rapid electronic switch. It processes signals while consuming negligible amounts of power. This energy efficiency makes superconducting technology an attractive candidate for data centers that handle massive, high-demand workloads. Conventional CMOS chips often struggle with the thermal and energy costs associated with high-density designs. Superconducting circuits offer a potential solution by reducing the power loss typically encountered as signals transit through the system.
Advancing Circuit Architecture with 30nm Wiring
Beyond junction density, Imec successfully demonstrated three layers of NbTiN wiring with widths as narrow as 30 nanometers. These wires are roughly 10 times thinner than those used in standard niobium-based superconducting processes. The reduction in wire width is critical, as it allows engineers to establish complex connections between circuit components in the same footprint. These wires effectively carry signals between internal circuit parts and bridge components across multiple layers.
Superconductors carry electrical current with virtually no resistance when kept at cryogenic temperatures. This property minimizes energy loss during transmission. Imec’s ability to tune the electrical properties of both the junctions and the wiring provides designers with greater flexibility. Such control is necessary to adapt these circuits for diverse applications, from high-performance computing clusters to emerging neuromorphic architectures. The integration of these materials into 300mm wafer processes further aligns the development with current manufacturing standards used by the broader semiconductor industry.
Future Implications for Computing Infrastructure
Imec aims to target a wide range of stakeholders, including chip foundries, hyperscale data center operators, and specialized system architects. Richard Rouse, the director of Imec’s Superconducting Digital Program, notes that this work serves as a foundation for scalable superconducting hardware. While the path ahead includes significant hurdles, such as the requirement for extreme cooling systems to maintain superconductivity, the 3.8 million-junction density marks a tangible proof point for the viability of the technology.
The industry is now looking toward 2.5D and 3D integration to combine these superconducting elements into functional systems. Researchers expect these advancements to yield benefits in quantum computing, photonics, and beyond. As data centers continue to face pressure to improve performance per watt, the shift toward superconducting circuits could represent a permanent change in how high-speed signals are managed. The coming years will reveal whether this 30nm wiring approach can be replicated outside of laboratory settings and move into commercial production lines.